InP Monolithically Integrated Transmitters Based on High Speed Directly Modulated DFB Lasers Open new browser tab
(2020)
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An overview of hardware acceleration techniques for 5G functions Open new browser tab
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Characterization and ENOB Analysis of a Reconfigurable Linear Optical Processor Open new browser tab
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AXI HyperConnect: A predictable, hypervisor-level interconnect for hardware accelerators in FPGA SoC Open new browser tab
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Spatio-Temporal Optimization of Deep Neural Networks for Reconfigurable FPGA SoCs Open new browser tab
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The ampere project: A model-driven development framework for highly parallel and energy-efficient computation supporting multi-criteria optimization Open new browser tab
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Safely Preventing Unbounded Delays During Bus Transactions in FPGA-based SoC Open new browser tab
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Behavioral analysis for virtualized network functions: A som-based approach Open new browser tab
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Heuristic partitioning of real-time tasks on multi-processors Open new browser tab
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Comparative Evaluation of Kernel Bypass Mechanisms for High-performance Inter-container Communications Open new browser tab
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